JUNE 18–22, 2017

Session Details

Name: BoF 13: Designing, Porting & Optimizing HPC Workloads for ARM Based Systems
Time: Tuesday, June 20, 2017
02:45 pm - 03:45 pm
Room:   Kontrast  
Breaks:03:15 pm - 03:45 pm Coffee Break
Speaker:   James Ang, Sandia National Laboratories
  Ross Miller, ORNL
  Neil Morgan, STFC Hartree Centre
  Larry Wikelius, Cavium
Abstract:   With leadership from early users and developers of ARM based systems targeting HPC, this BOF will bring together the HPC community working on ARM CPU architectures to share experiences, learnings and best methods on ARM systems. In addition to recent announcements regarding ARM based HPC systems including the Mont Blanc 3 (built by Atos), the Isambard GW4 HPC (Cray), the RIKEN Post-K (Fujitsu) and the prototype ‘ACE’ system at the Hartree Centre (Lenovo); HPE have supplied systems under an early access program. The ARM processor architecture for high end computing benefits from a growing ecosystem with support from commercial Linux Distro vendors, compiler and software tools ISVs and system vendors providing ARM based products for the high-performance computing and data analytics market. Fully utilizing the ARM architecture requires porting, tuning and optimization of HPC software, libraries and applications originally targeted for other architectures. The BOF will start with a short overview of the ARM64 architecture and HPC processor implementations. In Lightning Talks users share their experiences on porting and optimization for their HPC proxy and real workloads on ARM systems, key learnings relating to power and efficiency, resulting performance and future plans. An overview of available system and performance tools completes this session. There will be a moderated open discussion following the Lightning Talks with emphasis on HPC requirements including software tools, optimization targets and overall architecture development. The BOF will include discussion on establishing an ARM HPC Users Group along with follow on sessions after the ISC Conference.

Targeted Audience
HPC code developers, software tools developers, end users deploying, evaluating or considering ARM systems; advanced performance and optimization software engineers and researchers interested in ARM based system architecture deployments.