JUNE 18–22, 2017

Session Details

Name: Exascale System Developments (Architecture & Concepts)
Time: Tuesday, June 20, 2017
01:45 pm - 03:15 pm
Room:   Panorama 1
Messe Frankfurt
Breaks:03:15 pm - 03:45 pm Coffee Break
Moderator:   Teresa (Terri) M. Quinn, LLNL
Panelist:   John Danskin, NVIDIA
  Bronis R. de Supinski, LLNL
  Al Gara, Intel
  Satoshi Matsuoka, Tokyo Institute of Technology
  Simon McIntosh-Smith, University of Bristol
Abstract:   The promise of exascale computing is that it will not only replace the last two decades of computing, but it will also usher in computing capabilities far exceeding what we have today. We expect exascale computers to allow us to attack previously unsolvable problems and lead to profound impacts across many areas of scientific enquiry. Furthermore we anticipate that exascale computing will deliver tremendous improvements in the performance and energy efficiency of computing. Delivering exascale systems will require major new technology advances, the most important of which involve advances in energy efficiency. Our community expects these advances to be quite disruptive to our codes. Exascale system architects will have to consider the impact of their designs on the codes and must make code performance a first-class design requirement. At the same time, these designs must also be acceptable to a wider market. For example, companies designing the build blocks of exascale systems, -- servers, processors, networks, memory, and storage devices -- will also seek to sell their products to the cloud computing and data analytics markets. In this session, the panel will explore exascale computer architectures and conceptual designs from the point of view of both the designers of exascale systems and programmers of exascale codes. They will discuss architectures and concepts that could lead to useable exascale computer systems aligned to growing markets and the challenges and barriers to building such systems. The panelists will describe approaches to making architectural tradeoffs between the design objectives of energy efficiency, market relevance, and code performance.